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data sheet 1 features ? micro power design ? 2.4 v to 5.5 v battery operation ? high sensitivity and high stability of the magnetic switching points ? high resistance to mechanical stress ? digital output signal ? switching for both poles of a magnet (omnipolar) ? programming pin for the switching direction of the output ? not suitable for automotive application functional description the tle 4917 is an integrated hall-effect sensor designed specifically to meet the requirements of low-power devices. e.g. as an on/off switch in cellular flip-phones, with battery operating voltages of 2.4v ? 5.5v. precise magnetic switching points and high tem perature stability are ac hieved through the unique design of the internal circuit. an onboard clock scheme is used to reduce the average operating current of the ic. during the operate phase the ic compares the actual magnetic field detected with the internally compensated switching points. the output q is switched at the end of each operating phase. during the stand-by phase the output stage is latched and the current consumption of the device reduced to some a. the ic switching behaviour is omnipolar, i.e. it can be switched on with either the north or south pole of a magnet. the prg pin can be connected to v s which holds the output v q at a high level for b=0mt; conversely the output v q can be inverted by connecting the prg pin to gnd, which will hold the output v q at a low level for b=0mt. in this later case the presence of an adequate magnetic field will cause the output v q to switch to a high level ( i.e. off state ). type marking ordering code package tle 4917 17s q62705k 605 p-tsop6-6-2 low power hall switch tle 4917 p-tsop6-6-2
data sheet 2 pin configuration (top view) aep02801_c prg 6 5 gnd 4 gnd v s gnd q 123 top view sensitive area 17 s ym month year figure 1 pin definitions and functions pin symbol function 1 v s supply voltage 2 gnd ground 3 q open drain input 4 gnd ground 5 gnd ground 6 prg programming input
data sheet 3 aeb02800_c chopped amplifier hall probe latch active error compensation oscillator & sequencer threshold generator bias and compensation circuits v s 1 2, 4, 5 gnd comparator with hysteresis prg 6 3 q decision logic figure 2 block diagram circuit description the low power hall ic switch comprises a hall probe, bias generator, compensation circuits, oscillator, output latch and an n-channel open drain output transistor. the bias generator provides currents for the hall probe and the active circuits. compensation circuits stabiliz e the temperature behavior and r educe technology variations. the active error compensation rejects offsets in signal stages and the influence of mechanical stress to the hall probe caused by molding and soldering processes and other thermal stresses in the package. this chopper technique together with the threshold generator and the comparator ensures high accurate magnetic switching points. very low power consumption is achieved with a timing scheme controlled by an oscillator and a sequencer. this circuitry activates the sensor for 50 s (typical operating time) sets the output state after sequential questioning of the switch points and latches it with the beginning of the following standby phase (typ. 130 ms). in the standby phase the average current is reduced to typical 3.5 a. because of the long standby time compared to the operating time the overall averaged current is only slightly higher than the standby current. by connecting the programming pin to gnd (normal to v s ) the output state can be inverted to further reduce the current consumption in app lications where a high magnetic field is the
data sheet 4 normal state. in that case the output q is off at high magnetic fields and no current is flowing in the open drain transistor. the output transistor can sink up to 1 ma with a maximal saturation voltage v qsat . absolute maximum ratings parameter symbol limit values unit notes min. max. supply voltage v s ? 0.3 5.5 v supply current i s ? 1 2.5 ma output voltage v q ? 0.3 5.5 v output current i q ? 1 2 ma programming pin voltage v prg ? 0.3 5.5 1) v junction temperature t j ? 40 150 c storage temperature t s ? 40 150 c magnetic flux density b ? unlimited mt thermal resistance p-tsop6-6-2 r th ja ? 35 k/w 1) v prg must not exceed vs by more than 0.3v note: stresses above those listed here may cause permanent damage to the device. exposure to absolute maximum rating condi tions for extended periods may affect device reliability. esd protection human body model (hbm) tests according to: eos/esd association standard s5.1-1993 and mil. std. 883d method 3015.7 parameter symbol limit values unit notes min. max. esd voltage v esd 2 kv r = 1.5 k ?, c = 100 pf; t = 25 c
data sheet 5 operating range parameter symbol limit values unit notes min. typ. max. supply voltage v s 2.4 2.7 5.5 v 1) output voltage v q ? 0.3 2.7 5.5 v programming pin voltage v prg ? 0.3 0 0.3 v inverted output state v s ? 0.3 v s v s + 0.3 standard output state ambient temperature t a ? 40 25 85 c 1) a ceramic bypass capacitor of 10 nf at v s to gnd is highly recommended. ac/dc characteristics parameter symbol limit values unit notes min. typ. max. averaged supply current i savg 1 4 20 a averaged supply current during operating time i sopavg 0.5 1.1 2.5 ma transient peak supply current during operating time i sopt ? ? 2.5 ma t < 100 ns supply current during standby time i sstb 1 3.5 20 a output saturation voltage v qsat ? 0.13 0.4 v i q = 1 ma output leakage current i qleak ? 0.01 1 a output rise time t r ? 0.3 1 s r l = 2.7 k ? ; c l = 10 pf output fall time t f ? 0.1 1 s r l = 2.7 k ? ; c l = 10 pf operating time t op 15 50 93 1) 2) s standby time t stb ? 130 240 3) ms duty cycle t op / t stb ? 0.039 ? % start-up time of ic t stu ? 6 12 s 4) 1) for v s =3.5v the max. operating time t op max = 85s 2) includes the start-up time t stu 3) for v s =3.5v the max. standby time t stb max = 220ms 4) initial power on time. v s must be applied in this time ( typ. 6s to max. 12s ) to get already a valid output state after the first operating phase (typ. 56s). for rise times of v s > 12s, the output state is valid after the second operating phase (includes one standby phase), e.g. happens only when the battery in flip phones is changed.
data sheet 6 magnetic characteristics prg pin connected to v s parameter symbol limit values unit notes min. typ. max. operate points b ops b opn 3.5 ?7 5 ?5 7 ?3.5 mt mt 1) release points b rps b rpn 2.2 ?6 4 ?4 6 ?2.2 mt mt 1) hysteresis b hys 0.2 1 2 mt 1) positive magnetic fields are related to the approach of a magnetic south pole to the branded side of package prg pin connected to gnd parameter symbol limit values unit notes min. typ. max. operate points b ops b opn 2.2 -6 4 -4 6 -2.2 mt mt 1) release points b rps b rpn 3.5 -7 5 -5 7 -3.5 mt mt 1) hysteresis b hy 0.2 1 2 mt 1) positive magnetic fields are related to the approach of a magnetic south pole to the branded side of package note: the listed ac/dc and magnetic characteristics are ensured over the operating range of the integrated circuit. typical characte ristics specify mean values expected over the production spread. if not other specified, typical characteristics apply at t j = 25 c and v s = 2.7 v.
data sheet 7 aet02802-17 i s t i savg i sstb operating time standby time latch output t op 50 s t stb 130 ms i sopavg figure 3 timing diagram figure 4 programming of output with the prg pin
data sheet 8 all curves reflect typical values at the given parameters for t a in c and v s in v. magnetic switching points versus magnetic switching points versus temperature (v s =2.7v) supply voltage v s (t a =20c) (prg pin connected to v s) ) (prg pin connected to v s) ) -40 -20 0 20 40 60 80 100 -6 -4 -2 0 2 4 6 b[mt] t [c] b ops rps b b rpn opn b 2.5 3 3.5 4 4.5 5 5.5 6 -6 -4 -2 0 2 4 6 b[mt] s u [v] b ops rps b b rpn opn b supply current i sopavg during operating supply current i sopavg during operating time versus temperature (v s =2.7v) time versus supply voltage v s (t a =20c) -40 -20 0 20 40 60 80 100 0.5 1 1.5 2 2.5 i [m a ] t [c] sopa v g i 2.5 3 3.5 4 4.5 5 5.5 6 0 0.5 1 1.5 2 2.5 i [ma] s v [v] sopavg i
data sheet 9 supply current i sstb during standby supply current i sstb during standby time versus temperature (v s =2.7v) time versus supply voltage v s (t a =20c) -40 -20 0 20 40 60 80 100 0 2 4 6 8 10 12 14 16 18 20 i [ a ] t [c] sstb i 2.5 3 3.5 4 4.5 5 5.5 6 0 2 4 6 8 10 12 14 16 18 20 i [a] sstb i s v [v] output saturation voltage v qsat standby time t stb versus temperature versus temperature ( i q =1ma ) (v s = 2.7v) -40 -20 0 20 40 60 80 100 0 20 40 60 80 100 120 140 160 200 v[mv] v qsat t [c] -40 -20 0 20 40 60 80 100 100 110 120 130 140 150 160 170 180 t stb t [ms] t [c]
data sheet 10 top view marking on p-tsop6-6-2 package corresponds to pin 1 of device 17 654 123 direction of unreeling s y m package pieces / reel ? reel p-tsop6-6-2 3.000 180 mm figure 5 marking and ta pe loading orientation figure 6 foot print reflow soldering
data sheet 11 package dimensions weight : 0.015g coplanary : 0.1mm sorts of packing package outlines for tubes, trays etc. are contained in our data book ?package information?. smd = surface mounted device dimensions in mm p-tsop6-6-2 ( p lastic t hin s mall o utline- p ackage)
data sheet 12 information about the applicat ion circuit of the tle 4917 application circuit tle 4917 the minimum value for the pull up resistor can be calculated with the power supply voltage vs, the maximum current i qmax and the minimum output saturation voltage v qsat . example: for vs = 3 v: r lmin = (vs - v qsat min)/iqmax = (3 v - 0,1 v)/0,002 a = 1435 ? larger values for r l will reduce the current i q and therefore the power consumption. if the resistor rl is very large (>100 k ? ) a capacitor (app. 10pf) between output and gnd pin could be useful if capacitive coupled noise occurs. the load at the output q should have a large input resistance to reduce the current trough r l and the power consumption. the tle 4917 has 3 ground pins. from a mechanical point of view all ground pins should be connected to ground. shortest wires should be used to avoid ground loops. if there is a need to reduce the number of used ground-pins any ground-pin combination may me used. furthermore it is possible using only one ground-pin at the application, all pins are equivalent. the capacitor c is highly recommended to reduce noise on the power supply voltage and it will improve the emi/emc performance. furthermore it decreases the transient peak supply current during operation time. the ic toggles between low and high current consumption. this behaviour might produce additional noise at the power supply. the capacitor will reduce this noise. furthermore this capacitor is used to supply t he sensor if microbreaks (short loss of supply voltage) occur. shortest connection wires between ic and capacitor should be used to avoid noise. the switch s1 shows the programming feature of the output. example: if the prg-pin is connected to vs the ic will hold the output q at a high voltage level for b= 0 mt in this circuit. a magnetic field larger than the operating point will switch the output to low level. in typical applications the prg-pin is connected directly to vs or to gnd depending on the technical needs. avoid using a floating prg-pin. 1 vs c= 10 nf r l =2700 ? sensor v s output 2 gnd 3 q 6 prg 5 gnd 4 gnd s1 gnd tle 4917
data sheet 13 tle 4917 revision history: 2002-08-22 previous version: page subjects (major changes since last revision) for questions on technology, delivery and pric es please contact the infineon technologies offices in germany or the infineon technologies companies and representatives worldwide: see our webpage at http:// www.infi neon.com we listen to your comments any information within this document that you feel is wrong, unclear or missing at all? your feedback will help us to continuously improve the quality of this document. please send your proposal (including a reference to this document) to: feedback.sensors@infineon.com edition 2002-08-22 published by infineon technologies ag st.-martin-strasse 53 d-81541 mnchen ? infineon technologies ag 2000 all rights reserved. attention please! the information herein is given to describe certain component s and shall not be considered as warranted characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not lim ited to warranties of non-infringement, regarding circuits, des criptions and charts stated herein. infineon technologiesis an approved cecc manufacturer. information for further information on technology, delivery terms and condi tions and prices please contac t your nearest infineon technologi es office in germany or our infineon technologies representatives worldwide (see address list). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infi neon technologies office. infineon technologies components may only be used in life-support devic es or systems with the express written approval of infin eon technologies, if a failure of such components can reasonably be ex pected to cause the failure of that life-support device or sy stem, or to affect the safety or effectiveness of that device or syst em. life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protec t human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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